NXP Semiconductors has introduced the LPC2900 family of microcontrollers, expanding its already extensive lineup of ARM7 and ARM9-based MCUs. Built around the high-performance ARM968E-S processor core, the LPC2900 offers a cost-effective, flexible, and low-power solution ideal for industrial, medical, engine control, and automotive applications. The new family includes three models—the LPC2919, LPC2917, and LPC2915—bringing NXP's ARM-based MCU portfolio to over 50 products. These devices will be showcased at the Embedded Systems Conference in Boston this week.
The LPC2900 operates at up to 80 MHz and features two CAN controllers and two LIN interfaces, making it well-suited for applications like industrial automation and in-vehicle networking. It is optimized for performance and includes an on-chip Power Management Unit (PMU) that helps reduce power consumption. For instance, high-speed PWM and UART modules can run at different clock frequencies, allowing developers to further minimize power usage without sacrificing performance.
The LPC2900 also delivers robust connectivity with two CAN interfaces, two LIN buses, a standard serial bus, a high-resolution PWM, and two ADCs. This makes it a perfect choice for high-volume and high-performance applications such as engine control units, CAN gateways, PLCs, industrial networks, in-car entertainment systems, and navigation and comfort systems.
Geoff Lees, General Manager of NXP’s Microcontroller Product Line, stated, “The growth of 32-bit ARM-based MCUs is now outpacing other architectures. The LPC2900 strengthens NXP’s market leadership while complementing our existing LPC2000 and LPC3000 product lines, offering customers the broadest range of ARM-based MCUs in the industry.†He added that the LPC2900 provides an advanced system-level solution that enhances the value of NXP’s ARM7TDMI and ARM926EJ-based MCUs.
All three new models feature a simplified design with consistent peripherals and code compatibility. The LPC2917 and LPC2919 include a 32-bit memory controller that supports various static memory devices, including RAM, ROM, flash, burstROM, and external I/O. The device can support up to 768KB of on-chip flash and 80KB of SRAM. A unique 128-bit wide flash interface allows reading four words at once, improving performance compared to traditional single-word reads. The SRAM is divided into 16KB of tightly coupled memory for data, 16KB for code, and 48KB of general-purpose SRAM.
Each device integrates a CAN 2.0B controller that supports full CAN mode, three transmit buffers with automatic prioritization for efficient gateway functions, and comprehensive filtering for global CAN message acceptance. To ensure compatibility with existing development tools, all models use the standard ARM JTAG interface for testing and debugging.
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